1. Field of the Invention
The subject matter of the present invention pertains to a computer system, and more particularly, to a bypass path in a computer system for bypassing an instruction buffer when certain specific instructions are being executed.
2. Description of the Prior Art
Prior art computer systems, such as that shown in U.S. Pat. No. 3,949,379, execute instructions in a predetermined sequence. In such systems, an instruction to be executed is stored in an instruction register. An instruction buffer is connected to the instruction register for storing a next instruction to be executed in the sequence. When execution of the instruction is complete, the next instruction in the sequence, stored in the instruction buffer, is transferred to the instruction register, whereby execution of the next instruction commences. When execution of the next instruction begins, a further instruction in the sequence is stored in the instruction buffer.
However, certain special instructions, such as an EXECUTE instruction, may appear in the sequence. When a special instruction in the sequence is transferred to the instruction register for execution, another instruction, herein referred to as a "subject instruction", is taken out-of-sequence from the central storage facility and is transferred to the instruction register via the instruction buffer for execution. Since the "subject instruction" is transferred to the instruction register via the instruction buffer, the previous contents of the instruction buffer are destroyed. The previous contents of the instruction buffer include the next instruction to be executed in the sequence following execution of the special instruction.
Since the previous contents of the instruction buffer were destroyed, the predetermined sequence of instructions to be executed by the computer system was disrupted. Therefore, it was necessary to re-initialize the instruction buffer, that is, to fetch the next instruction in the sequence from storage and re-store it in the instruction buffer. This re-initialization consumes time and resources.
In addition, there are instances in which the byte-length of the instruction register is smaller than the byte-length of the instruction to be stored in the instruction register for execution.
The prior art, such as U.S. Pat. Nos. 4,268,907, 4,189,770, and IBM Technical Disclosure Bulletin Vol. 23, No. 12, May 1981, pp. 5329-5331 discloses various types of buffer bypass circuitry. However, this prior art fails to disclose, teach, or suggest the invention disclosed in this application, whereby the contents of the instruction buffer, containing the next instruction to be executed in the sequence, are preserved during execution of certain special instructions, such as the EXECUTE instruction.